1. Technical Field
The present invention relates to a convolution operation circuit. More particularly, the present invention relates to a convolution operation circuit that performs a convolution operation on a provided digital signal.
2. Related Art
Conventionally, there has been known a filter circuit that restricts and outputs a band of a provided digital signal. This filter circuit generates a signal restricted in a desired band by performing a convolution operation on the digital signal, for example.
For example, a finite impulse response filter circuit includes a plurality of delay means that is serially provided and sequentially delay data of the digital signal, a plurality of multiplication sections that is provided in correspondence with the plurality of delay means and multiply a predetermined filter coefficient by data output from the corresponding delay means, and an addition section that computes a sum of data output from the plurality of multiplication sections.
By such a configuration, the finite impulse response filter circuit performs a convolution operation on each digital signal data, and generates a signal of which a band is restricted. Now, since a related patent document is not recognized, the description is omitted.
However, when the number of bits of the respective data of the digital signal to be input is large, a circuit scale of the multiplication section becomes extremely large. Moreover, when thinning the number of data of the digital signal by means of a decimation filter, the number of effective bits of the respective data increases in accordance with a thinning rate. For this reason, when performing a convolution operation on a digital signal passing through the decimation filter, a large-scale arithmetic circuit becomes necessary.
Moreover, when a thinning rate in the decimation filter is variable, the number of effective bits of a digital signal to be input into a subsequent-stage finite impulse response filter circuit varies. In this case, it is necessary that the arithmetic section in the finite impulse response filter has a scale corresponding to a maximum value of the variable number of effective bits of the digital signal, and thus this causes the increase of a circuit scale.
Therefore, it is an object of the present invention to provide a convolution operation circuit that can solve the foregoing problems. The above and other objects can be achieved by combinations described in the independent claims. The dependent claims define further advantageous and exemplary combinations of the present invention.